IIT Ropar logo
IIT Ropar

Pardeep Duhan

Assistant Professor

Department of Electrical Engineering

Indian Institute of Technology Ropar, India

Nanoelectronic Devices Lab logo

Department of Electrical Engineering
IIT Ropar

Publications

Journal Articles

  1. Nikita Choudhary, Alwin Daus, Avinash Lahgere, Gangadhar Gupta, Pardeep Duhan, "Comprehensive TCAD-based geometry study on self-aligned coplanar top gate a-IGZO TFTs," APL Electronic Devices 1 September 2026; 2 (3): 036106. Journal link
  2. Prabhat Khedgarkar, Mohit D. Ganeriwala, Gangadhar Gupta, Pardeep Duhan, "1/f noise model for extracting bulk trap density in scaled metal oxide semiconductor field effect transistors," J. Appl. Phys. 28 December 2025; 138 (24): 244501. Journal link
  3. Ajay Kumar, Tarek Ali, David Lehninger, Pardeep Duhan, "Impact of interface traps and fixed interface charges on polarization and TER ratio in MFIS ferroelectric tunnel junctions: A TCAD study," J. Appl. Phys. 21 September 2025; 138 (11): 114503. Journal link
  4. Prabhat Khedgarkar, Mohit D. Ganeriwala, Pardeep Duhan, "TCAD-based investigation of 1/f noise in advanced 22 nm FDSOI MOSFETs," Appl. Phys. Lett. 11 November 2024; 125 (20): 203506. Journal link
  5. Bhairov Kumar Bhowmik, K M Rohith, Pardeep Duhan, Gagan Kumar, "Excitation of high-quality quasi-BIC toroidal mode in a lattice perturbed terahertz metasurface," Appl. Phys. Lett. 14 October 2024; 125 (16): 161701. Journal link
  6. Pardeep Duhan , Tarek Ali, Prabhat Khedgarkar, Kati Kühnel, Malte Czernohorsky, Matthias Rudolph, Raik Hoffmann, Ayse Sunbul , David Lehninger , Philipp Schramm, Thomas Kämpfe , and Konrad Seidel, "Endurance Study of Silicon-Doped Hafnium Oxide (HSO) and Zirconium-Doped Hafnium Oxide (HZO)-Based FeFET Memory," IEEE Transactions on Electron Devices, vol. 70, no. 11, pp. 5645-5650, Nov. 2023. Journal link
  7. Pardeep Duhan, V Ramgopal Rao, and Nihar R Mohapatra, "Effect of device dimensions, layout and pre-gate carbon implant on hot carrier induced degradation in HKMG nMOS transistors," IEEE Transactions on Device and Materials Reliability, vol. 20, no. 3, pp. 555-561, Sept. 2020. Journal link
  8. Pardeep Duhan, V Ramgopal Rao, and Nihar Ranjan Mohapatra, "PBTI in HKMG nMOS transistors-effect of width, layout, and other technological parameters," IEEE Transactions on Electron Devices, vol. 64, no. 10, pp. 4018-4024, Oct. 2017. Journal link
  9. Satya Sivanaresh M., Pardeep Duhan, and Nihar R Mohapatra, "Role of Device Dimensions and Layout on the Analog Performance of Gate-First HKMG nMOS Transistors," IEEE Transactions on Electron Devices, vol. 62, no. 11, pp. 3792-3798, Nov. 2015. Journal link
  10. Pardeep Duhan, Mohit D Ganeriwala, V Ramgopal Rao, and Nihar R Mohapatra, "Anomalous Width Dependence of Gate Current in High-K Metal Gate nMOS Transistors," IEEE Electron Device Letters, vol. 36, no. 8, pp. 739-741, Aug. 2015, doi: 10.1109/LED.2015.2440445. Journal link

Conference Articles

  1. Ajay Kumar, Trishla Gurjar, Vekariya Pritkumar, Devarshi Mrinal Das, and Pardeep Duhan, "Modeling and Performance Analysis of MFIS Stack FTJ-Based 1024×1024 Crossbar Array," Proc. IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Kolkata, India, Jul. 2026. Conference link
  2. Prabhat Khedgarkar, and Pardeep Duhan, "Impact of BOX scaling and ground plane on 1/\textit{f} noise in FDSOI pMOSFETs," 12th Joint EuroSOI Workshop and International Conference on Ultimate Integration on Silicon, Granada, Spain, May, 2026. Conference link
  3. Ayse Sünbül, Tarek Ali, Raik Hoffmann, Ricardo Revello, Yannick Raffel, Pardeep Duhan, David Lehninger, Kati Kühnel, Matthias Rudolph, Sebastian Oehler, Philipp Schramm, Malte Czernohorsky, Konrad Seidel, Thomas Kämpfe, and Lukas M Eng, "Impact of temperature on reliability of MFIS HZO-based ferroelectric tunnel junctions," 2022 IEEE International Reliability Physics Symposium (IRPS), Dallas, TX, USA, 2022, pp. P11-1-P11-5. Conference link
  4. Tarek Ali, Kati Kühnel, Konstantin Mertens, Malte Czernohorsky, Matthias Rudolph, Pardeep Duhan, David Lehninger, Raik Hoffmann, P Steinke, Johannes Müller, Jan Van Houdt, Konrad Seidel, and Lukas M Eng, "Effect of substrate implant tuning on the performance of MFIS silicon doped hafnium oxide (HSO) FeFET memory," 2020 IEEE International Memory Workshop (IMW), Dresden, Germany, 2020, pp. 1-4. Conference link
  5. Dang Khoa Huynh, Quang Huy Le, Pardeep Duhan, Defu Wang, Thomas Kämpfe, and Matthias Rudolph, "Analysis of hot-carrier degradation in 22nm FDSOI transistors using RF small-signal characteristics," 2020 German Microwave Conference (GeMiC), Cottbus, Germany, 2020, pp. 244-247. Conference link
  6. Jacopo Franco, Ben Kaczer, Subhadeep Mukhopadhyay, Pardeep Duhan, Pieter Weckx, Ph J Roussel, Thomas Chiarella, L-Å Ragnarsson, Lionel Trojman, Naoto Horiguchi, Alessio Spessot, Dimitri Linten, and Anda Mocuta, "Statistical model of the NBTI-induced threshold voltage, subthreshold swing, and transconductance degradations in advanced p-FinFETs," 2016 IEEE International Electron Devices Meeting (IEDM), San Francisco, CA, USA, 2016, pp. 15.3.1-15.3.4. Conference link
  7. Pardeep Duhan, V Ramgopal Rao, and Nihar R Mohapatra, "Width and layout dependence of HC and PBTI induced degradation in HKMG nMOS transistors," 2016 IEEE International Reliability Physics Symposium (IRPS), Pasadena, CA, USA, 2016, pp. XT-07-1-XT-07-5. Conference link
  8. Pardeep Duhan, Nihar R. Mohapatra, and Sharad Kumar Jain, "Width Dependence of HCI and PBTI in HKMG NMOS Transistors," Proceedings of ICMAT and IUMRS, Singapore, June, 2015. Conference link
  9. Nihar R Mohapatra, Satya Sivanaresh M., and Pardeep Duhan, "Effect of substrate implant tuning on the performance of MFIS silicon doped hafnium oxide (HSO) FeFET memory," 2015 International Symposium on VLSI Technology, Systems and Applications, Hsinchu, Taiwan, 2015. Conference link
  10. Satya Siva Naresh, Nihar Ranjan Mohapatra, and Pardeep Kumar Duhan, "Effects of HfO2 and lanthanum capping layer thickness on the narrow width behavior of gate first high-k and metal gate NMOS transistors," 2013 International Conference on Solid State Devices and Materials, Fukuoka, Japan, 2013. Conference link
  11. V.K.Khanna, and P. Duhan,, "Modeling the Current-Voltage characteristics & Temporal Drift in Threshold Voltage of ISFET for pH Measurements," ISSS National Conference on MEMS, Microsensors, Smart Materials, Structures and Systems, CEERI Pilani, 2007. Conference link